Senior Staff Engineer, Analog Design at Ambiq Micro — Singapore

<div class="content-intro">Company Overview Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology. We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency. At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve. If that's you, join us — the intelligence everywhere revolution starts here.  </div>Scope  As Senior Staff Engineer, Analog Design at Ambiq, you will drive the specification, architecture, and design of key analog subsystems, including PMUs, clocking, and data converters, with broader scope and greater design autonomy than the Staff level.  This role works closely with the Architecture and RTL teams to create custom analog designs that meet and exceed customer needs, often owning architecture decisions across more than one subsystem or product line simultaneously. Designs will be in leading-edge technologies, such as 22nm, 12nm, and beyond.  The successful candidate is a highly motivated, technically deep individual contributor who, through collaboration and mentorship, helps raise the technical bar for the broader design team without formal management responsibility.  The person in this role will be well-rounded, having been through many design cycles, and will be looked to as a go-to technical authority — from spec definition and whiteboarding through schematic design, layout supervision, validation, and production test.  This role will be onsite, and the candidate will be expected to have a presence on site 5 days a week.  Responsibilities  <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Lead chip-level and block-level spec definition across multiple related analog subsystems </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="2" data-aria-level="1">Drive circuit architectural design and verification decisions, often spanning more than one project or product line </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="3" data-aria-level="1">Perform transistor-level analog IC circuit design and verification for the most complex or highest-risk blocks </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="4" data-aria-level="1">Directly conduct or closely supervise analog circuit layout, including for other engineers' blocks </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="5" data-aria-level="1">Lead design reviews and drive resolution of complex, cross-block action items </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="6" data-aria-level="1">Mentor Staff and Senior engineers by providing technical input and guidance in design reviews </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="7" data-aria-level="1">Partner with digital designers to define and verify analog/digital interface behavior at the subsystem level </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="8" data-aria-level="1">Guide prototype chip testing strategy and lead validation of analog circuit blocks </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Develop and implement manufacturing test plans for analog circuit blocks; guide efficient test program development </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="10" data-aria-level="1">Support Marketing in product definition with deep technical input </li> </ul> <ul> <li data-leveltext="•" data-font="" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":450,"335559991":270,"469769242":[8226],"469777803":"left","469777804":"•","469777815":"hybridMultilevel"}" data-aria-posinset="11" data-aria-level="1">Support Product Engineering and Applications Engineering on complex manufacturing and customer issues </li> </ul>

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